This repository contains the experimental dataset and analysis scripts from a study on approximate hardware accelerators using adders from the EvoApprox library. The work investigates power dissipation and resource utilization (LUT and flip-flop usage) for FPGA implementations on Microchip PolarFire, Digilent Arty A7-35T, and Xilinx Alveo U250 platforms, and compares them with ASIC characterizations using a Sobel image processing accelerator. The study evaluates the transferability of ASIC-based characterizations to FPGA designs and analyzes the asymmetry of resource and power variations across platforms. Statistical validation was performed using One-Way ANOVA, Tukey’s post-hoc test, and Bartlett’s test. Results indicate that approximate designs in ASIC and FPGA can be statistically similar depending on the application, with negligible differences in power consumption and, in many cases, also in area. The repository provides the complete dataset, Python scripts for data processing and visualization, statistical analysis code, and CSV exports of all experimental results, supporting reproducibility and further research in approximate computing and hardware acceleration.